Tommy McMichen



I am a PhD candidate at Northwestern University with a B.S. in Computer Engineering and Computer Science from Rose-Hulman Institute of Technology. I study compilers, specifically looking into new abstractions and representations. My research aims to rethink existing compiler paradigms to improve how we handle data movement in traditional and emerging domains.


NOELLE Offers Empowering LLVM Extensions

The paper is available here.
The source code is available on GitHub.
For more information, see the ACM DL.

Angelo Matni, Enrico Armenio Deiana, Yian Su, Lukas Gross, Souradip Ghosh, Sotiris Apostolakis, Ziyang Xu, Zujun Tan, Ishita Chaturvedi, Brian Homerding, Tommy McMichen, David I. August, and Simone Campanoni
International Conference on Code Generation and Optimization (CGO), 2022
NOELLE provides abstractions to help build advanced code analyses and transformations on top of the production quality LLVM compiler. NOELLE has been used to accelerate a diverse set of research prototypes, with a powerful automatically parallelizing compiler built upon it. It is available open source on github to help accelerate your compiler research.

Fine-Grained Acceleration using Runtime Integrated Custom Execution (RICE)

The paper is available here.
For more information, see the ACM DL.

Leela Pakanati, Tommy McMichen, and Zachary Estrada
International Conference on Compliers, Architectures and Synthesis for Embedded Systems (CASES), 2019
Runtime Integrated Custom Execution (RICE) relocates traditional peripheral reconfigurable acceleration devices into the pipeline of the processor. This relocation unlocks fine-grained acceleration previously impeded by communication overhead to a peripheral accelerator. Preliminary simulation results on a subset of the PARSEC benchmark suite shows promise for RICE in HPC applications. This was published in a 'work-in-progress' paper track.

Developing Parallel Computation Architectures

Available on GitHub

Senior design project to improve the performance and efficiency of biologically-accurate neuron simulations using the Hodgkin-Huxley model and a LUT accelerator approach. Designed and developed novel parallel architecture to allow for parallel variable time-step integrators (VITAMIN), which achieved strong scaling on multi-core machines. Minimized hardware area usage of LUT accelerator, with similar execution time performance. Implemented software improvements to improve execution time performance.